PineBook Pro update and upgrade to 5.18.12: unable to boot

sndwvs · 08-03-2022, 11:44 AM

what image was used?
if it is possible to overwrite u-boot manually.

Code:

dd if=idbloader.img of=/dev/mmcblk0 seek=64 status=noxfer
dd if=uboot.img of=/dev/mmcblk0 seek=16384 status=noxfer
dd if=trust.img of=/dev/mmcblk0 seek=24576 status=noxfer

wowbaggerHU · 08-03-2022, 12:06 PM

I used your latest image from 20220801 on the SD card. Earlier when I did the tests when I updated U-Boot the trusted firmware and the idbloader on the emmc, then I also used the boot files from that same day.

sndwvs · 08-03-2022, 01:40 PM

Without an emmc from a sdcard it turns out to boot?

wowbaggerHU · 08-05-2022, 06:36 AM

Quote:

Originally Posted by sndwvs

Without an emmc from a sdcard it turns out to boot?

No unfortunatelym this is what I get:

Code:

DDR Version 1.25 20210517
In
channel 0
CS = 0
MR0=0x98
MR4=0x3
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x3
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x98
MR4=0x3
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training pass!
channel 1 training pass!
change freq to 416MHz 0,1
Channel 0: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
Channel 1: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
256B stride
channel 0
CS = 0
MR0=0x98
MR4=0x3
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x3
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x98
MR4=0x3
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x3
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training pass!
channel 1 training pass!
channel 0, cs 0, advanced training done
channel 0, cs 1, advanced training done
channel 1, cs 0, advanced training done
channel 1, cs 1, advanced training done
change freq to 856MHz 1,0
ch 0 ddrconfig = 0x101, ddrsize = 0x2020
ch 1 ddrconfig = 0x101, ddrsize = 0x2020
pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
ddr_set_rate to 328MHZ
ddr_set_rate to 666MHZ
ddr_set_rate to 416MHZ, ctl_index 0
ddr_set_rate to 856MHZ, ctl_index 1
support 416 856 328 666 MHz, current 856MHz
OUT
Boot1 Release Time: May 29 2020 17:36:36, version: 1.26
CPUId = 0x0
ChipType = 0x10, 348
mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
mmc: ERROR: Card did not respond to voltage select!
emmc reinit
mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
mmc: ERROR: Card did not respond to voltage select!
emmc reinit
mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
mmc: ERROR: Card did not respond to voltage select!
SdmmcInit=2 1
mmc0:cmd5,20
mmc0:cmd7,10
mmc0:cmd5,20
mmc0:cmd7,10
mmc0:cmd5,20
mmc0:cmd7,10
SdmmcInit=0 1
UsbBoot ...86503
powerOn 98730
Usb re Boot. 6098727
Usb re Boot. 12098730
Usb re Boot. 18098731
SoftReset
DDR Version 1.25 20210517
In
soft reset
SRX
channel 0
...

It still goes on a reboot loop.
I don't understand what is going on. This "DDR Version 1.25 20210517" part of the output only appeared after I used your latest image from the 1st of August. Previously it wasn't there. But since it now appears even without the emmc card being installed, I assume that the firmware that was used in your latest image updated some firmware internally in the CPU or motherboard.

sndwvs · 08-05-2022, 11:26 AM

Quote:

Originally Posted by wowbaggerHU

It still goes on a reboot loop.
I don't understand what is going on. This "DDR Version 1.25 20210517" part of the output only appeared after I used your latest image from the 1st of August. Previously it wasn't there. But since it now appears even without the emmc card being installed, I assume that the firmware that was used in your latest image updated some firmware internally in the CPU or motherboard.

there are 3 places with bootloader
1 spi
2 emmc
3 sdcard

spi you did not flash, but it looks like it is now there.

reset spi or rewrite the workers.

wowbaggerHU · 08-05-2022, 12:28 PM

Quote:

Originally Posted by sndwvs

reset spi or rewrite the workers.

What do you mean exactly by rewrite the workers?

sndwvs · 08-05-2022, 12:34 PM

any of the previous

Code:

For with SPL:
rkdeveloptool db rkxx_loader_vx.xx.bin
rkdeveloptool wl 0x40 idbloader.img
rkdeveloptool wl 0x4000 u-boot.itb
rkdeveloptool rd

sndwvs · 08-07-2022, 05:18 AM

try a new image, rootpart definition changed in it, bootloader creation algorithm changed and transfer script updated to emmc.

wowbaggerHU · 08-08-2022, 06:50 AM

Hi sndwvs,

I haven't rewritten anything so far in the SPI, as unfortunately we seem to have slowly gone from a simple fstab editing to overwriting the firmware of the SoC. We are doing more and more changes to the pinebook pro, which also entails a risk of bricking it. I would have preferred not to open it in the first place, but unfortunately since the ability to boot from the micro SD card seems to be gone, I have no other choice.

I have written your latest image to the emmc card, and edited the uEnv.txt so that the rootdev setting points now to mmcblk0p1.
The fstab needed no change, as it pointed to the root partition via its UUID.
This is the serial boot log that I got:

Code:

DDR Version 1.27 20211018
In
channel 0
CS = 0
MR0=0x98
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x98
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training pass!
channel 1 training pass!
change freq to 416MHz 0,1
Channel 0: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
Channel 1: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
256B stride
channel 0
CS = 0
MR0=0x98
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x98
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training pass!
channel 1 training pass!
channel 0, cs 0, advanced training done
channel 0, cs 1, advanced training done
channel 1, cs 0, advanced training done
channel 1, cs 1, advanced training done
change freq to 856MHz 1,0
ch 0 ddrconfig = 0x101, ddrsize = 0x2020
ch 1 ddrconfig = 0x101, ddrsize = 0x2020
pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
ddr_set_rate to 328MHZ
ddr_set_rate to 666MHZ
ddr_set_rate to 416MHZ, ctl_index 0
ddr_set_rate to 856MHZ, ctl_index 1
support 416 856 328 666 MHz, current 856MHz
OUT
Boot1 Release Time: May 29 2020 17:36:36, version: 1.26
CPUId = 0x0
ChipType = 0x10, 346
SdmmcInit=2 0
BootCapSize=100000
UserCapSize=59640MB
FwPartOffset=2000 , 100000
mmc0:cmd5,20
mmc0:cmd55,10
mmc0:cmd5,20
mmc0:cmd55,10
mmc0:cmd5,20
mmc0:cmd16,10
SdmmcInit=0 1
StorageInit ok = 262958
SecureMode = 0
SecureInit read PBA: 0x4
SecureInit read PBA: 0x404
SecureInit read PBA: 0x804
SecureInit read PBA: 0xc04
SecureInit read PBA: 0x1004
SecureInit read PBA: 0x1404
SecureInit read PBA: 0x1804
SecureInit read PBA: 0x1c04
SecureInit ret = 0, SecureMode = 0
atags_set_bootdev: ret:(0)
GPT 0x3335db8 signature is wrong
recovery gpt...
GPT 0x3335db8 signature is wrong
recovery gpt fail!
Trust Addr:0x4000, 0x58334c42
No find bl30.bin
No find bl32.bin
Load uboot, ReadLba = 2000
Load OK, addr=0x200000, size=0xd9a28
RunBL31 0x40000 @ 293863 us
NOTICE:  BL31: v1.3(release):845ee93
NOTICE:  BL31: Built : 15:51:11, Jul 22 2020
NOTICE:  BL31: Rockchip release version: v1.1
INFO:    GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO:    Using opteed sec cpu_context!
INFO:    boot cpu mask: 0
INFO:    plat_rockchip_pmu_init(1196): pd status 3e
INFO:    BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR:   Error initializing runtime service opteed_fast
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0x200000
INFO:    SPSR = 0x3c9


U-Boot 2022.07-rk3399 (Aug 07 2022 - 09:15:10 +0300)

SoC: Rockchip rk3399
Reset cause: POR
Model: Pine64 Pinebook Pro
DRAM:  3.9 GiB
Core:  318 devices, 34 uclasses, devicetree: separate
MMC:   mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0
Loading Environment from SPIFlash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
*** Warning - bad CRC, using default environment

In:    serial
Out:   vidconsole
Err:   vidconsole
Model: Pine64 Pinebook Pro
Net:   No ethernet found.
Hit any key to stop autoboot:  0 
starting USB...
Bus usb@fe380000: ehci_generic usb@fe380000: Failed to get clocks (ret=-19)
Port not available.
Bus usb@fe3a0000: USB OHCI 1.0
Bus usb@fe3c0000: ehci_generic usb@fe3c0000: Failed to get clocks (ret=-19)
Port not available.
Bus usb@fe3e0000: USB OHCI 1.0
Bus usb@fe800000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@fe900000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe3a0000 for devices... 1 USB Device(s) found
scanning bus usb@fe3e0000 for devices... 2 USB Device(s) found
scanning bus usb@fe800000 for devices... 1 USB Device(s) found
scanning bus usb@fe900000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Device 0: unknown device
switch to partitions #0, OK
mmc1 is current device
Scanning mmc 1:1...
Found U-Boot script /boot/boot.scr
2640 bytes read in 7 ms (368.2 KiB/s)
## Executing script at 00500000
Boot script loaded from mmc 1
166 bytes read in 5 ms (32.2 KiB/s)
84290 bytes read in 20 ms (4 MiB/s)
29702656 bytes read in 3117 ms (9.1 MiB/s)
384 bytes read in 10 ms (37.1 KiB/s)
Applying kernel provided DT overlay rockchip-rk3399-opp-2ghz.dtbo
267 bytes read in 10 ms (25.4 KiB/s)
Applying kernel provided DT overlay rockchip-pcie-gen2.dtbo
2698 bytes read in 11 ms (239.3 KiB/s)
Applying kernel provided DT fixup script (rockchip-fixup.scr)
## Executing script at 09000000
9582206 bytes read in 1011 ms (9 MiB/s)
Moving Image from 0x2080000 to 0x2200000, end=3ee0000
## Loading init Ramdisk from Legacy Image at 06000000 ...
   Image Name:   uInitrd
   Image Type:   AArch64 Linux RAMDisk Image (gzip compressed)
   Data Size:    9582142 Bytes = 9.1 MiB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 01f00000
   Booting using the fdt blob at 0x1f00000
   Loading Ramdisk to f45e9000, end f4f0c63e ... OK
   Loading Device Tree to 00000000f456c000, end 00000000f45e8fff ... OK

Starting kernel ...

At this point the display became garbled for a few seconds, then it became blank/black, and seemingly nothing happened. (All output on serial/internal display ceased at this point. Perhaps I will try deleting the uinitrd.)
Also, it doesn't seem to matter if I have an SD card in the slot or not, because the output seems to be the same. (It by default tries to boot from emmc. If I stop the autoboot, what would I have to enter to load things from the SD card?)

sndwvs · 08-08-2022, 07:08 AM

Quote:

Originally Posted by wowbaggerHU

Hi sndwvs,

I haven't rewritten anything so far in the SPI, as unfortunately we seem to have slowly gone from a simple fstab editing to overwriting the firmware of the SoC. We are doing more and more changes to the pinebook pro, which also entails a risk of bricking it. I would have preferred not to open it in the first place, but unfortunately since the ability to boot from the micro SD card seems to be gone, I have no other choice.

I have written your latest image to the emmc card, and edited the uEnv.txt so that the rootdev setting points now to mmcblk0p1.
The fstab needed no change, as it pointed to the root partition via its UUID.
This is the serial boot log that I got:

Code:

DDR Version 1.27 20211018
In
channel 0
CS = 0
MR0=0x98
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x98
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training pass!
channel 1 training pass!
change freq to 416MHz 0,1
Channel 0: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
Channel 1: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
256B stride
channel 0
CS = 0
MR0=0x98
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x98
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training pass!
channel 1 training pass!
channel 0, cs 0, advanced training done
channel 0, cs 1, advanced training done
channel 1, cs 0, advanced training done
channel 1, cs 1, advanced training done
change freq to 856MHz 1,0
ch 0 ddrconfig = 0x101, ddrsize = 0x2020
ch 1 ddrconfig = 0x101, ddrsize = 0x2020
pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
ddr_set_rate to 328MHZ
ddr_set_rate to 666MHZ
ddr_set_rate to 416MHZ, ctl_index 0
ddr_set_rate to 856MHZ, ctl_index 1
support 416 856 328 666 MHz, current 856MHz
OUT
Boot1 Release Time: May 29 2020 17:36:36, version: 1.26
CPUId = 0x0
ChipType = 0x10, 346
SdmmcInit=2 0
BootCapSize=100000
UserCapSize=59640MB
FwPartOffset=2000 , 100000
mmc0:cmd5,20
mmc0:cmd55,10
mmc0:cmd5,20
mmc0:cmd55,10
mmc0:cmd5,20
mmc0:cmd16,10
SdmmcInit=0 1
StorageInit ok = 262958
SecureMode = 0
SecureInit read PBA: 0x4
SecureInit read PBA: 0x404
SecureInit read PBA: 0x804
SecureInit read PBA: 0xc04
SecureInit read PBA: 0x1004
SecureInit read PBA: 0x1404
SecureInit read PBA: 0x1804
SecureInit read PBA: 0x1c04
SecureInit ret = 0, SecureMode = 0
atags_set_bootdev: ret:(0)
GPT 0x3335db8 signature is wrong
recovery gpt...
GPT 0x3335db8 signature is wrong
recovery gpt fail!
Trust Addr:0x4000, 0x58334c42
No find bl30.bin
No find bl32.bin
Load uboot, ReadLba = 2000
Load OK, addr=0x200000, size=0xd9a28
RunBL31 0x40000 @ 293863 us
NOTICE:  BL31: v1.3(release):845ee93
NOTICE:  BL31: Built : 15:51:11, Jul 22 2020
NOTICE:  BL31: Rockchip release version: v1.1
INFO:    GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO:    Using opteed sec cpu_context!
INFO:    boot cpu mask: 0
INFO:    plat_rockchip_pmu_init(1196): pd status 3e
INFO:    BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR:   Error initializing runtime service opteed_fast
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0x200000
INFO:    SPSR = 0x3c9


U-Boot 2022.07-rk3399 (Aug 07 2022 - 09:15:10 +0300)

SoC: Rockchip rk3399
Reset cause: POR
Model: Pine64 Pinebook Pro
DRAM:  3.9 GiB
Core:  318 devices, 34 uclasses, devicetree: separate
MMC:   mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0
Loading Environment from SPIFlash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
*** Warning - bad CRC, using default environment

In:    serial
Out:   vidconsole
Err:   vidconsole
Model: Pine64 Pinebook Pro
Net:   No ethernet found.
Hit any key to stop autoboot:  0 
starting USB...
Bus usb@fe380000: ehci_generic usb@fe380000: Failed to get clocks (ret=-19)
Port not available.
Bus usb@fe3a0000: USB OHCI 1.0
Bus usb@fe3c0000: ehci_generic usb@fe3c0000: Failed to get clocks (ret=-19)
Port not available.
Bus usb@fe3e0000: USB OHCI 1.0
Bus usb@fe800000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@fe900000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe3a0000 for devices... 1 USB Device(s) found
scanning bus usb@fe3e0000 for devices... 2 USB Device(s) found
scanning bus usb@fe800000 for devices... 1 USB Device(s) found
scanning bus usb@fe900000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Device 0: unknown device
switch to partitions #0, OK
mmc1 is current device
Scanning mmc 1:1...
Found U-Boot script /boot/boot.scr
2640 bytes read in 7 ms (368.2 KiB/s)
## Executing script at 00500000
Boot script loaded from mmc 1
166 bytes read in 5 ms (32.2 KiB/s)
84290 bytes read in 20 ms (4 MiB/s)
29702656 bytes read in 3117 ms (9.1 MiB/s)
384 bytes read in 10 ms (37.1 KiB/s)
Applying kernel provided DT overlay rockchip-rk3399-opp-2ghz.dtbo
267 bytes read in 10 ms (25.4 KiB/s)
Applying kernel provided DT overlay rockchip-pcie-gen2.dtbo
2698 bytes read in 11 ms (239.3 KiB/s)
Applying kernel provided DT fixup script (rockchip-fixup.scr)
## Executing script at 09000000
9582206 bytes read in 1011 ms (9 MiB/s)
Moving Image from 0x2080000 to 0x2200000, end=3ee0000
## Loading init Ramdisk from Legacy Image at 06000000 ...
   Image Name:   uInitrd
   Image Type:   AArch64 Linux RAMDisk Image (gzip compressed)
   Data Size:    9582142 Bytes = 9.1 MiB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 01f00000
   Booting using the fdt blob at 0x1f00000
   Loading Ramdisk to f45e9000, end f4f0c63e ... OK
   Loading Device Tree to 00000000f456c000, end 00000000f45e8fff ... OK

Starting kernel ...

At this point the display became garbled for a few seconds, then it became blank/black, and seemingly nothing happened. (All output on serial/internal display ceased at this point. Perhaps I will try deleting the uinitrd.)
Also, it doesn't seem to matter if I have an SD card in the slot or not, because the output seems to be the same. (It by default tries to boot from emmc. If I stop the autoboot, what would I have to enter to load things from the SD card?)

Hi wowbaggerHU,

While it is loaded with something, it is either not worth it to die and change something.
To boot from sdcard in uEnv.txt also specify rootdev=UUID=32539e08-a5c0-4084-9f32-0932043d95e3 (this setting can be copied from sdcarв) and set verbosity=8 to see what's going on (at least on tty) it looks like in kernel 5.19 broken output on LCD.
Уou can also try to return the old (5.18.y) kernel to test this hypothesis.

update: yes, the fixes for LSD work are slightly different than for the 5.18.y kernel, now I will update the patches and compile a new image.

wowbaggerHU · 08-08-2022, 09:41 AM

Okay, I removed the mmcblk0p1 entry for rootdev. It's only then that I noticed that there were two entries for rootdev: one with the UUID (as you asked) and then I added a secont entry with /dev/mmcblk0p1. I removed the latter. I also removed the initrd.
This is what I am getting now:

Code:

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[    0.000000] Linux version 5.19.0 (root@firefly-rk3399) (gcc (GCC) 11.2.0, GNU ld version 2.37-slack15) #1 SMP PREEMPT Sun Aug 7 09:18:52 EEST 2022
[    0.000000] Machine model: Pine64 Pinebook Pro
[    0.000000] earlycon: uart8250 at MMIO32 0x00000000ff1a0000 (options '')
[    0.000000] printk: bootconsole [uart8250] enabled
[    0.000000] efi: UEFI not found.
[    0.000000] NUMA: No NUMA configuration found
[    0.000000] NUMA: Faking a node at [mem 0x0000000000200000-0x00000000f7ffffff]
[    0.000000] NUMA: NODE_DATA [mem 0xf77c8040-0xf77c9fff]
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000000200000-0x00000000f7ffffff]
[    0.000000]   DMA32    empty
[    0.000000]   Normal   empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000200000-0x00000000f7ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000200000-0x00000000f7ffffff]
[    0.000000] On node 0, zone DMA: 512 pages in unavailable ranges
[    0.000000] cma: Reserved 128 MiB at 0x00000000e9000000
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.0 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: MIGRATE_INFO_TYPE not supported.
[    0.000000] psci: SMC Calling Convention v1.0
[    0.000000] percpu: Embedded 29 pages/cpu s81576 r8192 d29016 u118784
[    0.000000] pcpu-alloc: s81576 r8192 d29016 u118784 alloc=29*4096
[    0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5 
[    0.000000] Detected VIPT I-cache on CPU0
[    0.000000] CPU features: detected: GIC system register CPU interface
[    0.000000] CPU features: detected: ARM erratum 845719
[    0.000000] Fallback order for Node 0: 0 
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 999432
[    0.000000] Policy zone: DMA
[    0.000000] Kernel command line: root=UUID=32539e08-a5c0-4084-9f32-0932043d95e3 ro rootwait rootfstype=ext4 init=/sbin/init console=ttyS2,1500000n8 console=tty1 consoleblank=0 loglevel=8 usb-storage.quirks=  earlycon=uart8250,mmio32,0xff1a0000
[    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
[    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:on, heap free:off
[    0.000000] Memory: 3821328K/4061184K available (15872K kernel code, 2680K rwdata, 6236K rodata, 4352K init, 568K bss, 108784K reserved, 131072K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=6, Nodes=1
[    0.000000] trace event string verifier disabled
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu:     RCU event tracing is enabled.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=6.
[    0.000000]  Trampoline variant of Tasks RCU enabled.
[    0.000000]  Tracing variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=6
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[    0.000000] GICv3: 256 SPIs implemented
[    0.000000] GICv3: 0 Extended SPIs implemented
[    0.000000] Root IRQ handler: gic_handle_irq
[    0.000000] GICv3: GICv3 features: 16 PPIs
[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000fef00000
[    0.000000] ITS [mem 0xfee20000-0xfee3ffff]
[    0.000000] ITS@0x00000000fee20000: allocated 65536 Devices @500000 (flat, esz 8, psz 64K, shr 0)
[    0.000000] ITS: using cache flushing for cmd queue
[    0.000000] GICv3: using LPI property table @0x00000000004d0000
[    0.000000] GIC: using cache flushing for LPI property table
[    0.000000] GICv3: CPU0: using allocated LPI pending table @0x00000000004e0000
[    0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
[    0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] }
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns
[    0.000001] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns
[    0.002841] Console: colour dummy device 80x25
[    0.003280] printk: console [tty1] enabled
[    0.003684] printk: bootconsole [uart8250] disabled

The kernel is getting the following in its command line:

Code:

console=ttyS2,1500000n8 console=tty1

How can I remove the tty1 setting? It seems to be getting added automatically. Is it maybe due to the

Code:

console=both

setting? How can I force

Code:

console=ttyS2,1500000n8

only?

sndwvs · 08-08-2022, 12:34 PM

Quote:

Originally Posted by wowbaggerHU

The kernel is getting the following in its command line:

Code:

console=ttyS2,1500000n8 console=tty1

How can I remove the tty1 setting? It seems to be getting added automatically. Is it maybe due to the

Code:

console=both

setting? How can I force

Code:

console=ttyS2,1500000n8

only?

if set both will be

Code:

console=ttyS2,1500000n8 console=tty1

if display will be

Code:

console=ttyS2,1500000n8

if serial will be

Code:

console=tty1

wowbaggerHU · 08-08-2022, 12:43 PM

Quote:

Originally Posted by sndwvs

if set both will be

Code:

console=ttyS2,1500000n8 console=tty1

if display will be

Code:

console=ttyS2,1500000n8

if serial will be

Code:

console=tty1

Shouldn't it be the other way around? Ie: serial => ttyS2,1500000n8; display => tty1?

sndwvs · 08-08-2022, 01:09 PM

Quote:

Originally Posted by wowbaggerHU

Shouldn't it be the other way around? Ie: serial => ttyS2,1500000n8; display => tty1?

Yes you are right.

update: fixed

update 2: new images

wowbaggerHU · 08-09-2022, 09:42 AM

Okay, I tried the latest image. (But unfortunately lost my backup of the emmc's original content due to a slightly related mishap

)
I have removed the uInitrd image, plus set verbosity to 8, and console to serial in the uEnv.txt. It seems that the output reached a bit further than last time, but there is still nothing on the display, and it is still getting stuck after the last line of output.

Code:

...
NOTICE:  BL31: v1.3(release):845ee93
NOTICE:  BL31: Built : 15:51:11, Jul 22 2020
NOTICE:  BL31: Rockchip release version: v1.1
INFO:    GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
INFO:    Using opteed sec cpu_context!
INFO:    boot cpu mask: 0
INFO:    plat_rockchip_pmu_init(1196): pd status 3e
INFO:    BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR:   Error initializing runtime service opteed_fast
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0x200000
INFO:    SPSR = 0x3c9


U-Boot 2022.07-rk3399 (Aug 08 2022 - 16:57:05 +0300)

SoC: Rockchip rk3399
Reset cause: POR
Model: Pine64 Pinebook Pro
DRAM:  3.9 GiB
Core:  320 devices, 34 uclasses, devicetree: separate
MMC:   mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0
Loading Environment from SPIFlash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
*** Warning - bad CRC, using default environment

In:    serial
Out:   vidconsole
Err:   vidconsole
Model: Pine64 Pinebook Pro
Net:   No ethernet found.
Hit any key to stop autoboot:  0
starting USB...
Bus usb@fe380000: ehci_generic usb@fe380000: Failed to get clocks (ret=-19)
Port not available.
Bus usb@fe3a0000: USB OHCI 1.0
Bus usb@fe3c0000: ehci_generic usb@fe3c0000: Failed to get clocks (ret=-19)
Port not available.
Bus usb@fe3e0000: USB OHCI 1.0
Bus usb@fe800000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@fe900000: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe3a0000 for devices... 1 USB Device(s) found
scanning bus usb@fe3e0000 for devices... 2 USB Device(s) found
scanning bus usb@fe800000 for devices... 1 USB Device(s) found
scanning bus usb@fe900000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Device 0: unknown device
Card did not respond to voltage select! : -110
switch to partitions #0, OK
mmc0(part 0) is current device
Scanning mmc 0:1...
Found U-Boot script /boot/boot.scr
2640 bytes read in 19 ms (134.8 KiB/s)
## Executing script at 00500000
Boot script loaded from mmc 0
195 bytes read in 15 ms (12.7 KiB/s)
85260 bytes read in 47 ms (1.7 MiB/s)
30007808 bytes read in 1307 ms (21.9 MiB/s)
384 bytes read in 33 ms (10.7 KiB/s)
Applying kernel provided DT overlay rockchip-rk3399-opp-2ghz.dtbo
267 bytes read in 33 ms (7.8 KiB/s)
Applying kernel provided DT overlay rockchip-pcie-gen2.dtbo
2698 bytes read in 36 ms (72.3 KiB/s)
Applying kernel provided DT fixup script (rockchip-fixup.scr)
## Executing script at 09000000
Failed to load '/boot/uInitrd'
Moving Image from 0x2080000 to 0x2200000, end=3f40000
## Flattened Device Tree blob at 01f00000
   Booting using the fdt blob at 0x1f00000
   Loading Device Tree to 00000000f4e8d000, end 00000000f4f0afff ... OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[    0.000000] Linux version 5.19.0 (root@firefly-rk3399) (gcc (GCC) 11.2.0, GNU ld version 2.37-slack15) #1 SMP PREEMPT Mon Aug 8 17:01:07 EEST 2022
[    0.000000] Machine model: Pine64 Pinebook Pro
[    0.000000] earlycon: uart8250 at MMIO32 0x00000000ff1a0000 (options '')
[    0.000000] printk: bootconsole [uart8250] enabled
[    0.000000] efi: UEFI not found.
[    0.000000] NUMA: No NUMA configuration found
[    0.000000] NUMA: Faking a node at [mem 0x0000000000200000-0x00000000f7ffffff]
[    0.000000] NUMA: NODE_DATA [mem 0xf77c8040-0xf77c9fff]
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000000200000-0x00000000f7ffffff]
[    0.000000]   DMA32    empty
[    0.000000]   Normal   empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000200000-0x00000000f7ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000200000-0x00000000f7ffffff]
[    0.000000] On node 0, zone DMA: 512 pages in unavailable ranges
[    0.000000] cma: Reserved 128 MiB at 0x00000000e9000000
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.0 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: MIGRATE_INFO_TYPE not supported.
[    0.000000] psci: SMC Calling Convention v1.0
[    0.000000] percpu: Embedded 29 pages/cpu s81576 r8192 d29016 u118784
[    0.000000] pcpu-alloc: s81576 r8192 d29016 u118784 alloc=29*4096
[    0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5
[    0.000000] Detected VIPT I-cache on CPU0
[    0.000000] CPU features: detected: GIC system register CPU interface
[    0.000000] CPU features: detected: ARM erratum 845719
[    0.000000] Fallback order for Node 0: 0
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 999432
[    0.000000] Policy zone: DMA
[    0.000000] Kernel command line: root=UUID=32539e08-a5c0-4084-9f32-0932043d95e3 ro rootwait rootfstype=ext4 init=/sbin/init  console=ttyS2,1500000n8 consoleblank=0 loglevel=8 usb-storage.quirks=  earlycon=uart8250,mmio32,0xff1a0000
[    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
[    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:on, heap free:off
[    0.000000] Memory: 3821328K/4061184K available (15872K kernel code, 2680K rwdata, 6232K rodata, 4352K init, 568K bss, 108784K reserved, 131072K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=6, Nodes=1
[    0.000000] trace event string verifier disabled
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu:     RCU event tracing is enabled.
[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=6.
[    0.000000]  Trampoline variant of Tasks RCU enabled.
[    0.000000]  Tracing variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=6
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[    0.000000] GICv3: 256 SPIs implemented
[    0.000000] GICv3: 0 Extended SPIs implemented
[    0.000000] Root IRQ handler: gic_handle_irq
[    0.000000] GICv3: GICv3 features: 16 PPIs
[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x00000000fef00000
[    0.000000] ITS [mem 0xfee20000-0xfee3ffff]
[    0.000000] ITS@0x00000000fee20000: allocated 65536 Devices @500000 (flat, esz 8, psz 64K, shr 0)
[    0.000000] ITS: using cache flushing for cmd queue
[    0.000000] GICv3: using LPI property table @0x00000000004d0000
[    0.000000] GIC: using cache flushing for LPI property table
[    0.000000] GICv3: CPU0: using allocated LPI pending table @0x00000000004e0000
[    0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
[    0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] }
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns
[    0.000001] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns
[    0.002921] Console: colour dummy device 80x25
[    0.003465] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000)
[    0.004436] pid_max: default: 32768 minimum: 301
[    0.004992] LSM: Security Framework initializing
[    0.005469] Yama: becoming mindful.
[    0.005929] AppArmor: AppArmor initialized
[    0.006462] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
[    0.007203] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
[    0.011171] cblist_init_generic: Setting adjustable number of callback queues.
[    0.011913] cblist_init_generic: Setting shift to 3 and lim to 1.
[    0.012660] cblist_init_generic: Setting shift to 3 and lim to 1.
[    0.013571] rcu: Hierarchical SRCU implementation.
[    0.014026] rcu:     Max phase no-delay instances is 1000.
[    0.015716] Platform MSI: interrupt-controller@fee20000 domain created
[    0.016891] PCI/MSI: /interrupt-controller@fee00000/interrupt-controller@fee20000 domain created
[    0.020003] EFI services will not be available.
[    0.021306] smp: Bringing up secondary CPUs ...
[    0.022888] Detected VIPT I-cache on CPU1
[    0.022955] GICv3: CPU1: found redistributor 1 region 0:0x00000000fef20000
[    0.022979] GICv3: CPU1: using allocated LPI pending table @0x00000000004f0000
[    0.023048] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[    0.024477] Detected VIPT I-cache on CPU2
[    0.024544] GICv3: CPU2: found redistributor 2 region 0:0x00000000fef40000
[    0.024569] GICv3: CPU2: using allocated LPI pending table @0x0000000000580000
[    0.024634] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
[    0.026063] Detected VIPT I-cache on CPU3
[    0.026128] GICv3: CPU3: found redistributor 3 region 0:0x00000000fef60000
[    0.026152] GICv3: CPU3: using allocated LPI pending table @0x0000000000590000
[    0.026220] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
[    0.027666] CPU features: detected: Spectre-v2
[    0.027680] CPU features: detected: Spectre-v4
[    0.027685] CPU features: detected: Spectre-BHB
[    0.027696] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
[    0.027702] Detected PIPT I-cache on CPU4
[    0.027738] GICv3: CPU4: found redistributor 100 region 0:0x00000000fef80000
[    0.027757] GICv3: CPU4: using allocated LPI pending table @0x00000000005a0000
[    0.027800] CPU4: Booted secondary processor 0x0000000100 [0x410fd082]
[    0.029107] Detected PIPT I-cache on CPU5
[    0.029152] GICv3: CPU5: found redistributor 101 region 0:0x00000000fefa0000
[    0.029171] GICv3: CPU5: using allocated LPI pending table @0x00000000005b0000
[    0.029216] CPU5: Booted secondary processor 0x0000000101 [0x410fd082]
[    0.029376] smp: Brought up 1 node, 6 CPUs
[    0.043197] SMP: Total of 6 processors activated.
[    0.043647] CPU features: detected: 32-bit EL0 Support
[    0.044130] CPU features: detected: 32-bit EL1 Support
[    0.044615] CPU features: detected: CRC32 instructions
[    0.046773] CPU: All CPU(s) started at EL2
[    0.047226] alternatives: patching kernel code
[    0.050699] devtmpfs: initialized
[    0.067216] Registered cp15_barrier emulation handler
[    0.067728] Registered setend emulation handler
[    0.068420] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    0.069400] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
[    0.072929] pinctrl core: initialized pinctrl subsystem
[    0.074102] DMI not present or invalid.
[    0.075261] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    0.078820] DMA: preallocated 2048 KiB GFP_KERNEL pool for atomic allocations
[    0.080935] DMA: preallocated 2048 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[    0.082808] DMA: preallocated 2048 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[    0.083654] audit: initializing netlink subsys (disabled)
[    0.084438] audit: type=2000 audit(0.080:1): state=initialized audit_enabled=0 res=1
[    0.085687] thermal_sys: Registered thermal governor 'fair_share'
[    0.085697] thermal_sys: Registered thermal governor 'bang_bang'
[    0.086286] thermal_sys: Registered thermal governor 'step_wise'
[    0.086864] thermal_sys: Registered thermal governor 'user_space'
[    0.087940] cpuidle: using governor menu
[    0.089136] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[    0.090004] ASID allocator initialised with 65536 entries
[    0.090530] HugeTLB: can optimize 4095 vmemmap pages for hugepages-1048576kB
[    0.091211] HugeTLB: can optimize 127 vmemmap pages for hugepages-32768kB
[    0.091863] HugeTLB: can optimize 7 vmemmap pages for hugepages-2048kB
[    0.092491] HugeTLB: can optimize 0 vmemmap pages for hugepages-64kB
[    0.094363] Serial: AMBA PL011 UART driver
[    0.121163] platform ff770000.syscon:phy@f780: Fixing up cyclic dependency with fe330000.mmc
[    0.127980] platform ff970000.edp: Fixing up cyclic dependency with ff8f0000.vop
[    0.128765] platform ff970000.edp: Fixing up cyclic dependency with ff900000.vop
[    0.140332] rockchip-gpio ff720000.gpio: probed /pinctrl/gpio@ff720000
[    0.141756] rockchip-gpio ff730000.gpio: probed /pinctrl/gpio@ff730000
[    0.143185] rockchip-gpio ff780000.gpio: probed /pinctrl/gpio@ff780000
[    0.144551] rockchip-gpio ff788000.gpio: probed /pinctrl/gpio@ff788000
[    0.145864] rockchip-gpio ff790000.gpio: probed /pinctrl/gpio@ff790000
[    0.148275] platform edp-panel: Fixing up cyclic dependency with ff970000.edp
[    0.173272] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
[    0.173951] HugeTLB registered 32.0 MiB page size, pre-allocated 0 pages
[    0.174600] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[    0.175249] HugeTLB registered 64.0 KiB page size, pre-allocated 0 pages
[    0.176834] cryptd: max_cpu_qlen set to 1000
[    0.246075] raid6: neonx8   gen()  1662 MB/s
[    0.314237] raid6: neonx4   gen()  1671 MB/s
[    0.382399] raid6: neonx2   gen()  1478 MB/s
[    0.450568] raid6: neonx1   gen()  1159 MB/s
[    0.518750] raid6: int64x8  gen()   904 MB/s
[    0.586904] raid6: int64x4  gen()  1001 MB/s
[    0.655066] raid6: int64x2  gen()   940 MB/s
[    0.723230] raid6: int64x1  gen()   729 MB/s
[    0.723645] raid6: using algorithm neonx4 gen() 1671 MB/s
[    0.791384] raid6: .... xor() 1273 MB/s, rmw enabled
[    0.791865] raid6: using neon recovery algorithm
[    0.908838] iommu: Default domain type: Translated 
[    0.909320] iommu: DMA domain TLB invalidation policy: strict mode 
[    0.910387] SCSI subsystem initialized
[    0.910983] libata version 3.00 loaded.
[    0.911617] usbcore: registered new interface driver usbfs
[    0.912194] usbcore: registered new interface driver hub
[    0.912754] usbcore: registered new device driver usb
[    0.913882] pps_core: LinuxPPS API ver. 1 registered
[    0.914363] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.915269] PTP clock support registered
[    0.915943] EDAC MC: Ver: 3.0.0
[    0.917534] NetLabel: Initializing
[    0.917869] NetLabel:  domain hash size = 128
[    0.918291] NetLabel:  protocols = UNLABELED CIPSOv4 CALIPSO
[    0.918898] NetLabel:  unlabeled traffic allowed by default
[    0.919636] vgaarb: loaded
[    0.920364] clocksource: Switched to clocksource arch_sys_counter
[    0.921416] VFS: Disk quotas dquot_6.6.0
[    0.921854] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    0.923402] AppArmor: AppArmor Filesystem Enabled
[    0.935654] NET: Registered PF_INET protocol family
[    0.936478] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
[    0.941818] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
[    0.942826] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.943636] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
[    0.944884] TCP bind hash table entries: 32768 (order: 7, 524288 bytes, linear)
[    0.946240] TCP: Hash tables configured (established 32768 bind 32768)
[    0.947044] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
[    0.947839] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
[    0.948921] NET: Registered PF_UNIX/PF_LOCAL protocol family
[    0.949491] NET: Registered PF_XDP protocol family
[    0.949960] PCI: CLS 0 bytes, default 64
[    0.951954] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
[    0.953334] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available
[    0.955019] kvm [1]: IPA Size Limit: 40 bits
[    0.956839] kvm [1]: vgic-v2@fff20000
[    0.957227] kvm [1]: GIC system register CPU interface enabled
[    0.958067] kvm [1]: vgic interrupt IRQ18
[    0.958703] kvm [1]: Hyp mode initialized successfully
[    0.961809] Initialise system trusted keyrings
[    0.962306] Key type blacklist registered
[    0.962930] workingset: timestamp_bits=44 max_order=20 bucket_order=0
[    0.970546] zbud: loaded
[    0.972808] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.974243] fuse: init (API version 7.36)
[    0.976257] integrity: Platform Keyring initialized
[    1.040876] xor: measuring software checksum speed
[    1.044745]    8regs           :  2912 MB/sec
[    1.048310]    32regs          :  3132 MB/sec
[    1.053045]    arm64_neon      :  2293 MB/sec
[    1.053467] xor: using function: 32regs (3132 MB/sec)
[    1.053962] Key type asymmetric registered
[    1.054359] Asymmetric key parser 'x509' registered
[    1.056909] alg: self-tests for CTR-KDF (hmac(sha256)) passed
[    1.057560] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
[    1.058502] io scheduler mq-deadline registered
[    1.058944] io scheduler kyber registered
[    1.059470] io scheduler bfq registered
[    1.086764] dma-pl330 ff6d0000.dma-controller: Loaded driver for PL330 DMAC-241330
[    1.087508] dma-pl330 ff6d0000.dma-controller:       DBUFF-32x8bytes Num_Chans-6 Num_Peri-12 Num_Events-12
[    1.090044] dma-pl330 ff6e0000.dma-controller: Loaded driver for PL330 DMAC-241330
[    1.090780] dma-pl330 ff6e0000.dma-controller:       DBUFF-128x8bytes Num_Chans-8 Num_Peri-20 Num_Events-16