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Old 12-04-2021, 06:58 PM   #151
h2-1
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fourtysixandtwo, yeah, that thought crossed my mind too. Glad to have fresher eyes than mine looking at this.

pinxi 3.3.09-28 features that change, and also a massive optimization, which so far in testing on some systems knocked off a whopping 6.2 seconds (the more cores, the more time it knocks off, seems to be cpu / platform dependent too). Another one it knocked off about 0.4 seconds. Mine it knocked off I think about 0.2 seconds.

Code:
pinxi -C
CPU:
  Info: 6-core model: AMD Ryzen 5 2600 bits: 64 type: MT MCP cache:
  L2: 3 MiB
  Speed (MHz): avg: 2400 min/max: 1550/3400 cores: 1: 1288 2: 2151 3: 2302
  4: 3765 5: 1560 6: 1867 7: 1561 8: 3819 9: 1559 10: 1549 11: 3482 12: 3898

real	0m0.682s
user	0m0.155s
sys	0m0.032s

time inxi -Cy
CPU:
  Info: 6-Core model: AMD Ryzen 5 2600 bits: 64 type: MT MCP cache: L2: 3 MiB
  Speed: 3240 MHz min/max: 1550/3400 MHz Core speeds (MHz): 1: 3240 2: 1815
  3: 2011 4: 1990 5: 3464 6: 3816 7: 3256 8: 2138 9: 2090 10: 1538 11: 2956
  12: 2924

real	0m0.712s
user	0m0.183s
sys	0m0.041s

time pinxi -Ca
CPU:
  Info: model: AMD Ryzen 5 2600 bits: 64 type: MT MCP arch: Zen+
  family: 17 (23) model-id: 8 stepping: 2 microcode: 8008204 bogomips: 6799
  flags: avx avx2 ht lm nx pae sse sse2 sse3 sse4_1 sse4_2 sse4a ssse3 svm
  Topology: cpus: 1x cores: 6 tpc: 2 threads: 12 cache: L1: 576 KiB
  desc: d-6x32 KiB; i-6x64 KiB L2: 3 MiB desc: 6x512 KiB L3: 16 MiB
  desc: 2x8 MiB
  Speed (MHz): avg: 2340 high: 3396 min/max: 1550/3400 boost: enabled cores:
  1: 1559 2: 2787 3: 3396 4: 3227 5: 1516 6: 1559 7: 3318 8: 3254 9: 1371
  10: 2878 11: 1848 12: 1373
...
real	0m0.680s
user	0m0.151s
sys	0m0.037s

time inxi -Cay
CPU:
  Info: 6-Core model: AMD Ryzen 5 2600 bits: 64 type: MT MCP arch: Zen+
  family: 17 (23) model-id: 8 stepping: 2 microcode: 8008204 cache:
  L1: 576 KiB L2: 3 MiB L3: 16 MiB
  flags: avx avx2 ht lm nx pae sse sse2 sse3 sse4_1 sse4_2 sse4a ssse3 svm
  bogomips: 81588
  Speed: 2289 MHz min/max: 1550/3400 MHz boost: enabled Core speeds (MHz):
  1: 2289 2: 1816 3: 2026 4: 2818 5: 3330 6: 1667 7: 3012 8: 3405 9: 2675
  10: 3125 11: 2944 12: 2348
...
real	0m0.712s
user	0m0.166s
sys	0m0.056s
As you can see, despite doing a ton more work, pinxi -C is running faster than inxi -C, consistently.

I'll be taking a look to see if there are any more low hanging optimization fruits to be had, I suspect I can knock off another 10% or so, maybe, if I am always running stuff that only needs to run in specific cases.

With the caches moved to Topology line, that means all CPUs that have /sys data will show on the Topology line now, so it will also be more consistent for -Ca. Non Linux and legacy Linux/hardware will show roughly what they used to show, though I'm removing more of the somewhat nonsensical hacks as I become more sure that they are not good ideas in general.

This is the system that dropped 6 (SIX) plus seconds with those two optimizations:

Code:
time ./pinxi -Ca
CPU:
  Info: model: Intel Xeon E5-2620 v4 bits: 64 type: MT MCP SMP
  arch: Broadwell family: 6 model-id: 4F (79) stepping: 1 microcode: B00003E
  bogomips: 4199
  flags: avx avx2 ht lm nx pae sse sse2 sse3 sse4_1 sse4_2 ssse3 vmx
  Topology: cpus: 2x cores: 8 tpc: 2 threads: 16 cache:
  L1: 2x 512 KiB (1024 KiB) desc: d-8x32 KiB; i-8x32 KiB
  L2: 2x 2 MiB (4 MiB) desc: 8x256 KiB L3: 2x 20 MiB (40 MiB) desc: 1x20 MiB
  Speed (MHz): avg: 1454 high: 2572 min/max: 1200/3000
  boost: <superuser required> cores: 1: 1200 2: 1842 3: 1200 4: 1200 5: 2538
  6: 1302 7: 1200 8: 1200 9: 1717 10: 1200 11: 1954 12: 1561 13: 1200
  14: 1875 15: 1820 16: 1200 17: 1200 18: 1651 19: 1200 20: 1604 21: 2572
  22: 1200 23: 1219 24: 1200 25: 1242 26: 1200 27: 1228 28: 1200 29: 1200
  30: 1873 31: 1358 32: 1200
...
real	0m1.311s
user	0m0.230s
sys	0m0.093s

time ./pinxi -C
CPU:
  Info: 2x 8-core model: Intel Xeon E5-2620 v4 bits: 64 type: MT MCP SMP
  cache: L2: 2x 2 MiB (4 MiB)
  Speed (MHz): avg: 1798 min/max: 1200/3000 cores: 1: 2100 2: 1450 3: 1622
  4: 1512 5: 2094 6: 2383 7: 1563 8: 1223 9: 1916 10: 2097 11: 1988 12: 2100
  13: 2069 14: 1423 15: 1801 16: 1521 17: 2014 18: 1441 19: 1932 20: 1863
  21: 2086 22: 2310 23: 2031 24: 1746 25: 2100 26: 2100 27: 1228 28: 1509
  29: 1746 30: 1783 31: 1599 32: 1210

real	0m1.325s
user	0m0.253s
sys	0m0.072s

time ./inxi -Cay
CPU:
  Info: 2x 8-Core model: Intel Xeon E5-2620 v4 bits: 64 type: MT MCP SMP
  arch: Broadwell family: 6 model-id: 4F (79) stepping: 1 microcode: B00003E
  cache: L1: 2x 512 KiB (1024 KiB) L2: 2x 2 MiB (4 MiB) L3: 2x 20 MiB (40 MiB)
  flags: avx avx2 ht lm nx pae sse sse2 sse3 sse4_1 sse4_2 ssse3 vmx
  bogomips: 134426
  Speed: 1859 MHz min/max: 1200/3000 MHz Core speeds (MHz): 1: 1200 2: 1704
  3: 1200 4: 1247 5: 2072 6: 1200 7: 1902 8: 2054 9: 1200 10: 1837 11: 1200
  12: 1922 13: 1200 14: 2100 15: 1300 16: 1802 17: 1841 18: 1899 19: 2100
  20: 1200 21: 1264 22: 1993 23: 1200 24: 2081 25: 2050 26: 2065 27: 2100
  28: 1300 29: 1777 30: 2041 31: 1848 32: 2100
....
real	0m1.451s
user	0m0.397s
sys	0m0.101s

time ./inxi -Cy
CPU:
  Info: 2x 8-Core model: Intel Xeon E5-2620 v4 bits: 64 type: MT MCP SMP
  cache: L2: 2x 2 MiB (4 MiB)
  Speed: 1850 MHz min/max: 1200/3000 MHz Core speeds (MHz): 1: 1957 2: 1704
  3: 1455 4: 1462 5: 2100 6: 2420 7: 1264 8: 1879 9: 1977 10: 1771 11: 1276
  12: 1986 13: 1253 14: 2305 15: 1634 16: 2100 17: 1884 18: 2100 19: 1238
  20: 1412 21: 1468 22: 2100 23: 2403 24: 1980 25: 1210 26: 1665 27: 2292
  28: 1577 29: 2100 30: 1940 31: 2100 32: 1366

real	0m1.432s
user	0m0.329s
sys	0m0.143s
Assuming reasonable code logic, pinxi should have been faster than inxi despite having a lot more code running because pinxi was continuously optimized during this process, all hash/array movements were switched to fully by reference, whereas inxi was doing a lot of them in CPU by copying over and over, that was one of the legacy issues I corrected in the code from the start.

If I can consistently drop 100ths of seconds from a specific optimization, I'll usually go for it, and if 1000ths in loops, usually too. So there may be some more time to get now that the overall logic is working. I did have to sacrifice some error handling ability however with part of this optimization, but I think it should be ok.

Certain types of hardware/platforms seem to run slightly slower with pinxi -C than inxi -C, that may be a function of those being virtualized, I'm not sure, I'll see if I can pinpoint the slowdown there. About 0.25 seconds slower. That may be because the guest has to query the host for this data, which may suffer some lag, whereas on systems where it gets it directly, it actually ends up being faster.

Note that there is an oddity with flags, with -Cf, the flags item moves, but with -Cx, the shorter flag list is in a different spot. However, if I move the -f flags to be the same spot, it would push the topology down under it, which would not be very intuitive I think.

Last edited by h2-1; 12-04-2021 at 07:13 PM.
 
Old 12-04-2021, 07:43 PM   #152
h2-1
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Order is now much cleaner and more consistent, in pinxi 3.3.09-29
  1. -b
    Info:
  2. -C
    Info:
    Speeds:
  3. -Cx
    Info:
    Speeds:
    Flags: [short list]
  4. -Ca
    Info:
    Topology: [unless cpuinfo only, legacy, or BSD]
    Speed:
    Flags: [short list]
    Vulnerabilities:
  5. -Cf
    Info:
    Speed:
    Flags: [full list]
  6. -Caf
    Info:
    Topology: [unless cpuinfo only, legacy, or BSD]
    Speed:
    Flags: [full list]
    Vulnerabilities:

This 'feels' much better to me, and fixes a lot of super old random weird output decisions that I can't for the life of me remember or explain.

Note that is a new filter option,--zv/--filter-vulnerabilities, and the old --filter-labels --filter--uuids now have terser forms --zl --zu

This is starting to really shape up nicely now I think.

Take it for a spin after updating and let me know if you see anything else the seems off or out of place.

But this is starting to feel 'done' almost to me, barring any suggestions, so I think I'll spend some time on optimizations and check to see if anything is slowing things down due to weak or redundant or unnecessary logic, then fix those issues.

It would be cool if I could get pinxi -C to be always faster than inxi -C on all systems, right now it's faster on most, which is not what I expected given now much more complicated the logic is now than before.

I'm still seeing some significant slowdowns between 'pinxi' alone and 'inxi' alone however, so I'll see where that is coming from, something else might have slipped in unnoticed that is slowing it down besides CPU logic.

Last edited by h2-1; 12-05-2021 at 04:02 PM.
 
Old 12-04-2021, 09:15 PM   #153
JayByrd
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On this ancient system, pinxi shows much improved time. (Wall-time slightly better, but sys-time cut by more than half.)

inxi:
Code:
~$ inxi --version | grep ^inxi
inxi 3.3.09-00 (2021-11-22)

~$ time inxi -MCazy
Machine:
  Type: Unknown Mobo: ASUSTeK model: P5A-B v: REV 1.XX
  serial: <superuser required> BIOS: Award
  v: ASUS P5A-B Revision 1011 Beta 005 date: 05/02/02
CPU:
  Info: Single Core model: AMD-K6 3D bits: 32 type: UP arch: K6-2 family: 5
  model-id: 8 stepping: C (12) microcode: N/A cache: L1: 64 KiB L2: 64 KiB
  flags: N/A bogomips: 570
  Speed: 285 MHz min/max: N/A Core speed (MHz): 1: 285
  Vulnerabilities: Type: itlb_multihit status: Not affected
  Type: l1tf status: Not affected
  Type: mds status: Not affected
  Type: meltdown status: Not affected
  Type: spec_store_bypass status: Vulnerable
  Type: spectre_v1
  mitigation: usercopy/swapgs barriers and __user pointer sanitization
  Type: spectre_v2
  mitigation: Full generic retpoline, STIBP: disabled, RSB filling
  Type: srbds status: Not affected
  Type: tsx_async_abort status: Not affected

real	0m12.665s
user	0m10.892s
sys	0m1.301s
latest pinxi:
Code:
~$ ./pinxi --version | grep ^pinxi
pinxi 3.3.09-29 (2021-12-04)

~$ time ./pinxi -MCazy
Machine:
  Type: Unknown Mobo: ASUSTeK model: P5A-B v: REV 1.XX
  serial: <superuser required> BIOS: Award
  v: ASUS P5A-B Revision 1011 Beta 005 date: 05/02/02
Use of uninitialized value in numeric ne (!=) at ./pinxi line 10613.
CPU:
  Info: model: AMD-K6 3D bits: 32 type: UP arch: K6-2 family: 5 model-id: 8
  stepping: C (12) microcode: N/A bogomips: 570
  Topology: cpus: 1x cores: 1 cache: 64 KiB note: check
  Speed (MHz): 285 min/max: N/A core: 1: 285
  Flags: N/A
  Vulnerabilities:
  Type: itlb_multihit status: Not affected
  Type: l1tf status: Not affected
  Type: mds status: Not affected
  Type: meltdown status: Not affected
  Type: spec_store_bypass status: Vulnerable
  Type: spectre_v1
  mitigation: usercopy/swapgs barriers and __user pointer sanitization
  Type: spectre_v2
  mitigation: Full generic retpoline, STIBP: disabled, RSB filling
  Type: srbds status: Not affected
  Type: tsx_async_abort status: Not affected

real	0m10.444s
user	0m9.575s
sys	0m0.469s
PS. The error message (highlighted in red above) is also showing up when I run pinxi on my wife's Dell DM061, but not on my Dell Precision490. I'm thinking perhaps an empty value for "$topo->{'threads'}" ..?

Last edited by JayByrd; 12-04-2021 at 09:30 PM. Reason: detail, and additional error info.
 
Old 12-04-2021, 09:30 PM   #154
fourtysixandtwo
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Couple of errors have popped back in with the -29 version I see.

Code:
# time ./inxi -Caz
Can't use an undefined value as a HASH reference at ./inxi line 9595.

real    0m33.888s
user    0m32.350s
sys     0m1.140s

time ./pinxi -Caz
Use of uninitialized value in pattern match (m//) at ./pinxi line 8454.
CPU:
  Info: single core model: 486 bits: N/A type: UP arch: N/A family: 4
  model-id: N/A microcode: N/A cache: N/A bogomips: N/A
  Speed: N/A min/max: N/A core: No per core speed data found.
  Flags: N/A
  Vulnerabilities: No CPU vulnerability/bugs data available.

real    0m34.402s
user    0m32.770s
sys     0m1.250s
Code:
# time ./inxi -Ca
CPU:       Info: Single Core model: AMD Athlon 64 3000+ socket: 754 bits: 64 type: UP arch: K8 family: F (15) model-id: C (12)
           stepping: 0 microcode: 3A cache: L1: 128 KiB L2: 512 KiB
           flags: lm nx pae sse sse2 bogomips: 4004
           Speed: 2000 MHz min/max: 1000/2000 MHz base/boost: 2000/2400 volts: 1.5 V ext-clock: 200 MHz Core speed (MHz):
           1: 2000
           Vulnerabilities: Type: itlb_multihit status: Not affected
           Type: l1tf status: Not affected
           Type: mds status: Not affected
           Type: meltdown status: Not affected
           Type: spec_store_bypass status: Not affected
           Type: spectre_v1 mitigation: usercopy/swapgs barriers and __user pointer sanitization
           Type: spectre_v2 mitigation: Full AMD retpoline, STIBP: disabled, RSB filling
           Type: srbds status: Not affected
           Type: tsx_async_abort status: Not affected

real    0m0.956s
user    0m0.488s
sys     0m0.104s

# time ./pinxi -Ca
Use of uninitialized value in numeric ne (!=) at ./pinxi line 10613.
CPU:
  Info: model: AMD Athlon 64 3000+ socket: 754 bits: 64 type: UP arch: K8
  family: F (15) model-id: C (12) stepping: 0 microcode: 3A bogomips: 4004
  Topology: cpus: 1x cores: 1 cache: L1: 128 KiB
  desc: d-1x64 KiB; i-1x64 KiB L2: 512 KiB desc: 1x512 KiB
  Speed (MHz): 1000 min/max: 1000/2000 base/boost: 2000/2400 volts: 1.5 V
  ext-clock: 200 MHz core: 1: 1000
  Flags: lm nx pae sse sse2
  Vulnerabilities:
  Type: itlb_multihit status: Not affected
  Type: l1tf status: Not affected
  Type: mds status: Not affected
  Type: meltdown status: Not affected
  Type: spec_store_bypass status: Not affected
  Type: spectre_v1
  mitigation: usercopy/swapgs barriers and __user pointer sanitization
  Type: spectre_v2
  mitigation: Full AMD retpoline, STIBP: disabled, RSB filling
  Type: srbds status: Not affected
  Type: tsx_async_abort status: Not affected

real    0m0.941s
user    0m0.483s
sys     0m0.094s
Code:
$ time ./inxi -Ca
CPU:       Info: Quad Core model: ARMv7 v7l variant: cortex-a53 bits: 32 type: MCP arch: v7l family: 7 model-id: 0 stepping: 4
           features: Use -f option to see features bogomips: 307
           Speed: 1200 MHz min/max: 600/1200 MHz Core speeds (MHz): 1: 1200 2: 1200 3: 1200 4: 1200
           Vulnerabilities: No CPU vulnerability/bugs data available.

real   0m1.465s
user   0m0.946s
sys    0m0.170s

$ time ./pinxi -Ca
Use of uninitialized value in numeric ne (!=) at ./pinxi line 10611.
CPU:
  Info: model: ARMv7 v7l variant: cortex-a53 bits: 32 type: MCP arch: v7l
  family: 7 model-id: 0 stepping: 4 bogomips: 76
  Topology: cpus: 1x cores: 4 cache: N/A
  Speed (MHz): avg: 1200 min/max: 600/1200 cores: 1: 1200 2: 1200 3: 1200
  4: 1200
  Features: Use -f option to see features
  Vulnerabilities: No CPU vulnerability/bugs data available.

real   0m1.747s
user   0m1.229s
sys    0m0.170s
 
Old 12-04-2021, 10:18 PM   #155
h2-1
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Quick tests and bug finds much appreciated.

Those were both trying to work with undefined values, as you suspected.

Perl always keeps you honest in that way.

This is my starting to cut out more code and merging stuff, but forgetting that some of those tests for null were there for a reason, heh.

Should be fixed in 3.3.09-30

I'll try testing on some of my test sys/cpuinfo pairs as well.

I've been cutting out a lot of extra logic today, and merged some stuff, of course no machines I tested on had the data yours do, so appreciate it.

Most fixes aren't too major so it's going to be smaller corner case stuff like this I hope, keeping my fingers crossed, I cut out a fair chunk of stuff today.

Still getting used to the move, correctly, of Topology: to under Info:, on your arm device, I was like, oh, no, topolgoy didn't work!@!

Last edited by h2-1; 12-04-2021 at 10:19 PM.
 
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Old 12-04-2021, 11:24 PM   #156
JayByrd
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Quote:
Originally Posted by h2-1 View Post
...Those were both trying to work with undefined values, as you suspected.
Should be fixed in 3.3.09-30...
Confirmed. Both Dell DM061 and AMD K6 3D no longer showing undefined value error.
 
Old 12-05-2021, 12:47 AM   #157
chrisretusn
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For what is worth, here in my output. The Topology is now showing as you indicated above. Still shows L3 cache, maybe there is one. To my untrained eye it is all perfect.
Code:
root@racermach:~# ./pinxi --version | grep ^pinxi
pinxi 3.3.09-30 (2021-12-04)
root@racermach:~# ./pinxi -MCazy
Machine:
  Type: Desktop System: Gigabyte product: M68MT-S2 v: N/A serial: N/A Chassis:
  type: 3 serial: N/A
  Mobo: Gigabyte model: M68MT-S2 serial: N/A BIOS: Award v: F1
  date: 11/15/2010
CPU:
  Info: model: AMD Phenom II X4 840 socket: M2 bits: 64 type: MCP arch: K10
  family: 10 (16) model-id: 5 stepping: 3 microcode: 10000C8 bogomips: 6429
  Topology: cpus: 1x cores: 4 cache: L1: 512 KiB desc: d-4x64 KiB; i-4x64 KiB
  L2: 2 MiB desc: 4x512 KiB L3: 512 KiB
  Speed (MHz): avg: 800 min/max: 800/3200 base/boost: 3200/3200
  boost: disabled volts: 1.0 V ext-clock: 200 MHz cores: 1: 800 2: 800 3: 800
  4: 800
  Flags: ht lm nx pae sse sse2 sse3 sse4a svm
  Vulnerabilities:
  Type: itlb_multihit status: Not affected
  Type: l1tf status: Not affected
  Type: mds status: Not affected
  Type: meltdown status: Not affected
  Type: spec_store_bypass status: Not affected
  Type: spectre_v1
  mitigation: usercopy/swapgs barriers and __user pointer sanitization
  Type: spectre_v2
  mitigation: Full AMD retpoline, STIBP: disabled, RSB filling
  Type: srbds status: Not affected
  Type: tsx_async_abort status: Not affected
 
Old 12-05-2021, 02:21 AM   #158
truepatriot76
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Code:
root@slackbox Downloads# ./pinxi --version | grep ^pinxi
pinxi 3.3.09-30 (2021-12-04)
root@slackbox Downloads# ./pinxi -MCazy
Machine:
  Type: Desktop Mobo: ASRock model: X570 Taichi serial: <filter>
  UEFI: American Megatrends v: P4.60 date: 08/03/2021
CPU:
  Info: model: AMD Ryzen 7 5700G with Radeon Graphics socket: AM4 bits: 64
  type: MT MCP arch: Zen 3 family: 19 (25) model-id: 50 (80) stepping: 0
  microcode: A50000C bogomips: 7600
  Topology: cpus: 1x cores: 8 tpc: 2 threads: 16 cache: L1: 512 KiB
  desc: d-8x32 KiB; i-8x32 KiB L2: 4 MiB desc: 8x512 KiB L3: 16 MiB
  desc: 1x16 MiB
  Speed (MHz): avg: 1422 high: 1692 min/max: 1400/4672 base/boost: 3800/4650
  boost: enabled volts: 1.4 V ext-clock: 100 MHz cores: 1: 1391 2: 1396
  3: 1415 4: 1692 5: 1414 6: 1416 7: 1401 8: 1396 9: 1399 10: 1399 11: 1399
  12: 1396 13: 1403 14: 1413 15: 1415 16: 1413
  Flags: avx avx2 ht lm nx pae sse sse2 sse3 sse4_1 sse4_2 sse4a ssse3 svm
  Vulnerabilities:
  Type: itlb_multihit status: Not affected
  Type: l1tf status: Not affected
  Type: mds status: Not affected
  Type: meltdown status: Not affected
  Type: spec_store_bypass
  mitigation: Speculative Store Bypass disabled via prctl and seccomp
  Type: spectre_v1
  mitigation: usercopy/swapgs barriers and __user pointer sanitization
  Type: spectre_v2 mitigation: Full AMD retpoline, IBPB: conditional, IBRS_FW,
  STIBP: always-on, RSB filling
  Type: srbds status: Not affected
  Type: tsx_async_abort status: Not affected
 
Old 12-05-2021, 03:07 AM   #159
h2-1
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chrisretusn, not quite perfect:
https://www.cpu-world.com/CPUs/K10/A...42GM.htmlLevel 1 cache size ? 4 x 64 KB 2-way set associative instruction caches
4 x 64 KB 2-way set associative data caches
Level 2 cache size ? 4 x 512 KB 16-way set associative exclusive caches
Level 3 cache size None

However, I suspect this is the system lying to pinxi unfortunately.

If you can confirm this with these:
Code:
for i in $(ls /sys/devices/system/cpu/{cpu*/topology,cpu*/cpufreq,cpu*/cache/index*,smt}/*);do echo -n "$i::";cat $i;done > cpu-sys.txt
cat /proc/cpuinfo > cpuinfo.txt

# and also:
pinxi -Ca --dbg 39 > pinxi-39.txt
I remember earlier in the thread seeing a phantom L3 cache, but I had assumed that was coming from dmidecode by accident, but your data seems to indicate that it's coming from the cache data somewhere else:

Code:
L3: 512 KiB
the lack of 'desc:' there suggests it came from either /proc/cpuinfo or from dmidecode.

I will have to check that logic to make sure neither can leak in by accident, looks however like it is, unless it's a weird /sys reading that I failed to properly handle. I'm suspecting this one is a bug in pinxi.

Last edited by h2-1; 12-05-2021 at 03:09 AM.
 
Old 12-05-2021, 06:36 AM   #160
chrisretusn
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Quote:
Originally Posted by h2-1 View Post
chrisretusn, not quite perfect:
https://www.cpu-world.com/CPUs/K10/A...40WFK42GM.html 1 cache size ? 4 x 64 KB 2-way set associative instruction caches
4 x 64 KB 2-way set associative data caches
Level 2 cache size ? 4 x 512 KB 16-way set associative exclusive caches
Level 3 cache size None

However, I suspect this is the system lying to pinxi unfortunately.

If you can confirm this with these:
Code:
for i in $(ls /sys/devices/system/cpu/{cpu*/topology,cpu*/cpufreq,cpu*/cache/index*,smt}/*);do echo -n "$i::";cat $i;done > cpu-sys.txt
cat /proc/cpuinfo > cpuinfo.txt

# and also:
pinxi -Ca --dbg 39 > pinxi-39.txt
The link has some extra stuff "Level" at the end. Fixed in my quote above

Here is my results:
Code:
~# ./pinxi --version | grep ^pinxi
pinxi 3.3.09-30 (2021-12-04)

~# for i in $(ls /sys/devices/system/cpu/{cpu*/topology,cpu*/cpufreq,cpu*/cache/index*,smt}/*);do echo -n "$i::";cat $i;done > cpu-sys.txt
cat /proc/cpuinfo > cpuinfo.txt
cat: '/sys/devices/system/cpu/cpu0/cpufreq/stats:': No such file or directory
cat: reset: No such file or directory
cat: time_in_state: No such file or directory
cat: total_trans: No such file or directory
cat: trans_table: No such file or directory
cat: '/sys/devices/system/cpu/cpu1/cpufreq/stats:': No such file or directory
cat: reset: No such file or directory
cat: time_in_state: No such file or directory
cat: total_trans: No such file or directory
cat: trans_table: No such file or directory
cat: '/sys/devices/system/cpu/cpu2/cpufreq/stats:': No such file or directory
cat: reset: No such file or directory
cat: time_in_state: No such file or directory
cat: total_trans: No such file or directory
cat: trans_table: No such file or directory
cat: '/sys/devices/system/cpu/cpu3/cpufreq/stats:': No such file or directory
cat: reset: No such file or directory
cat: time_in_state: No such file or directory
cat: total_trans: No such file or directory
cat: trans_table: No such file or directory

~# ./pinxi -Ca --dbg 39 > pinxi-39.txt
Resulting text files are attached.

Also pastebin links:

https://pastebin.com/3P62sjjd
https://pastebin.com/LhKF3spF
Attached Files
File Type: txt cpu-sys.txt (15.3 KB, 2 views)
File Type: txt cpuinfo.txt (3.9 KB, 2 views)

Last edited by chrisretusn; 12-05-2021 at 06:37 AM.
 
Old 12-05-2021, 11:02 AM   #161
TheTKS
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h2-1, for a little more ARM content: Raspberry Pi 4B with latest SlackwareARM -current (32 bit) (Nov 30 updates) with Sarpi kernel packages 5.15.5 of Nov 28

Code:
# uname -a
...slackwarearm 5.15.5-v7l-sarpi4 #1 SMP Fri Nov 26 11:06:48 GMT 2021 armv7l BCM2711 GNU/Linux
Code:
# inxi --version | grep ^inxi
inxi 3.3.09-00 (2021-11-22)

# pinxi --version | grep ^pinxi
pinxi 3.3.09-30 (2021-12-04)
Code:
# inxi -MCazy
Machine:
  Type: ARM Device System: Raspberry Pi 4 Model B Rev 1.1 details: BCM2711
  rev: c03111 serial: <filter>
CPU:
  Info: Quad Core model: ARMv7 v7l variant: cortex-a72 bits: 32 type: MCP
  arch: v7l family: 7 model-id: 0 stepping: 3
  features: Use -f option to see features bogomips: 1080
  Speed: 1500 MHz min/max: 600/1500 MHz Core speeds (MHz): 1: 1100 2: 1100
  3: 1100 4: 1100
  Vulnerabilities: No CPU vulnerability/bugs data available.
Code:
# pinxi -MCazy1
Machine:
  Type: ARM
  System: Raspberry Pi 4 Model B Rev 1.1
    details: BCM2711
    rev: c03111
    serial: <filter>

CPU:
  Info:
    model: ARMv7 v7l
    variant: cortex-a72
    bits: 32
    type: MCP
    arch: v7l
    family: 7
    model-id: 0
    stepping: 3
    bogomips: 198
  Topology:
    cpus: 1
      cores: 4
    cache: N/A
  Speed (MHz):
    avg: 700
    min/max: 600/1500
    cores:
      1: 700
      2: 700
      3: 700
      4: 700
  Features: Use -f option to see features
  Vulnerabilities: No CPU vulnerability/bugs data available.
TKS
 
Old 12-05-2021, 12:07 PM   #162
fourtysixandtwo
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With the exception of below everything looks fine with -30 so far.

Still seeing the following error on the 486. Also any reason it's not picking up the bogomips from /proc/cpuinfo?

Code:
# ./pinxi --version | grep ^pinxi          
pinxi 3.3.09-30 (2021-12-04)


# time ./pinxi -Caz               
Use of uninitialized value in pattern match (m//) at ./pinxi line 8454.
CPU:
  Info: single core model: 486 bits: N/A type: UP arch: N/A family: 4
  model-id: N/A microcode: N/A cache: N/A bogomips: N/A
  Speed: N/A min/max: N/A core: No per core speed data found.
  Flags: N/A
  Vulnerabilities: No CPU vulnerability/bugs data available.

real    0m34.127s
user    0m32.600s
sys     0m1.140s
 
Old 12-05-2021, 12:54 PM   #163
h2-1
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fourtysixandtwo, can you post your full /proc/cpuinfo from that system?

I'm not clear why the flags item is returning that error, that may be some unhandled value in the flags field.

Bogomips too.
 
Old 12-05-2021, 12:58 PM   #164
h2-1
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TheTKS, thanks for the ARM data, looks about right. Raspberry pi had a lot of fixes over past year to get everything there working again after they changed some key device types which were very hard to detect (their bluetooth in particular was very difficult to detect, inxi has a pi only detection running to catch that now, nobody else that I am aware of in the world uses that type of bluetooth device, not usb, some type of odd serial device).

That pi shows the pinxi speed optimizations working very well, if you notice what inxi thinks the base speeds are vs what pinxi shows them as, that's a big improvement.

I was supposed to get access to some serious ARM server hardware, but it hasn't happened yet.

Last edited by h2-1; 12-05-2021 at 01:00 PM.
 
1 members found this post helpful.
Old 12-05-2021, 01:22 PM   #165
h2-1
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chrisretusn, that L3 has to be coming from the dmidecode fallback, can you post the output for this:

pinxi -Ca --dbg 2

then cut out the blocks start with 4 or 7, that might show me what is going on there, I think it's some alternate value that is tripping pinxi up there.

Those are from dmidecode, and look like this:
Code:
[
            4,
            44,
            'processor',
            'Socket Designation: AM4',
            'Type: Central Processor',
            'Family: Zen',
            'Manufacturer: Advanced Micro Devices, Inc.',
            'ID: 82 0F 80 00 FF FB 8B 17',
            'Signature: Family 23, Model 8, Stepping 2',
            'Flags:',
            '~FPU (Floating-point unit on-chip)',
            '~VME (Virtual mode extension)',
            '~DE (Debugging extension)',
            '~PSE (Page size extension)',
            '~TSC (Time stamp counter)',
            '~MSR (Model specific registers)',
            '~PAE (Physical address extension)',
            '~MCE (Machine check exception)',
            '~CX8 (CMPXCHG8 instruction supported)',
            '~APIC (On-chip APIC hardware supported)',
            '~SEP (Fast system call)',
            '~MTRR (Memory type range registers)',
            '~PGE (Page global enable)',
            '~MCA (Machine check architecture)',
            '~CMOV (Conditional move instruction supported)',
            '~PAT (Page attribute table)',
            '~PSE-36 (36-bit page size extension)',
            '~CLFSH (CLFLUSH instruction supported)',
            '~MMX (MMX technology supported)',
            '~FXSR (FXSAVE and FXSTOR instructions supported)',
            '~SSE (Streaming SIMD extensions)',
            '~SSE2 (Streaming SIMD extensions 2)',
            '~HTT (Multi-threading)',
            'Version: AMD Ryzen 5 2600 Six-Core Processor',
            'Voltage: 1.1 V',
            'External Clock: 100 MHz',
            'Max Speed: 3900 MHz',
            'Current Speed: 3400 MHz',
            'Status: Populated, Enabled',
            'Upgrade: Socket AM4',
            'L1 Cache Handle: 0x0029',
            'L2 Cache Handle: 0x002A',
            'L3 Cache Handle: 0x002B',
            'Serial Number: Unknown',
            'Asset Tag: Unknown',
            'Part Number: Unknown',
            'Core Count: 6',
            'Core Enabled: 6',
            'Thread Count: 12',
            'Characteristics:',
            '~64-bit capable',
            '~Multi-Core',
            '~Hardware Thread',
            '~Execute Protection',
            '~Enhanced Virtualization',
            '~Power/Performance Control'
          ],
          [
            7,
            41,
            'cache',
            'Socket Designation: L1 - Cache',
            'Configuration: Enabled, Not Socketed, Level 1',
            'Operational Mode: Write Back',
            'Location: Internal',
            'Installed Size: 576 kB',
            'Maximum Size: 576 kB',
            'Supported SRAM Types:',
            '~Pipeline Burst',
            'Installed SRAM Type: Pipeline Burst',
            'Speed: 1 ns',
            'Error Correction Type: Multi-bit ECC',
            'System Type: Unified',
            'Associativity: 8-way Set-associative'
          ],
          [
            7,
            42,
            'cache',
            'Socket Designation: L2 - Cache',
            'Configuration: Enabled, Not Socketed, Level 2',
            'Operational Mode: Write Back',
            'Location: Internal',
            'Installed Size: 3 MB',
            'Maximum Size: 3 MB',
            'Supported SRAM Types:',
            '~Pipeline Burst',
            'Installed SRAM Type: Pipeline Burst',
            'Speed: 1 ns',
            'Error Correction Type: Multi-bit ECC',
            'System Type: Unified',
            'Associativity: 8-way Set-associative'
          ],
          [
            7,
            43,
            'cache',
            'Socket Designation: L3 - Cache',
            'Configuration: Enabled, Not Socketed, Level 3',
            'Operational Mode: Write Back',
            'Location: Internal',
            'Installed Size: 16 MB',
            'Maximum Size: 16 MB',
            'Supported SRAM Types:',
            '~Pipeline Burst',
            'Installed SRAM Type: Pipeline Burst',
            'Speed: 1 ns',
            'Error Correction Type: Multi-bit ECC',
            'System Type: Unified',
            'Associativity: 16-way Set-associative'
          ],
I suspect that there is some matching syntax that is getting thrown off.

Your /proc/cpuinfo has only the expected 'cache size:' item, and your sys data has only caches level 1i, 1d, and 2, no 3.

So this has to be coming from dmidecode somehow I believe, there's no other explanation that makes sense, unless I'm missing something obvious internally.
 
  


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