hi,
i am working with a Intel 440MX-based embedded system -- specifically, it uses the Intel 82443MX integrated north/south device ("Banister"). the CPU is a mobile Celeron/400MHz.

i would like to be able to toggle the 440MX GPIO pins from a userland application running under linux (2.4 kernel). i.e., i need to toggle GPIO1 (pin E4) through GPIO20 (pin K3).

according to the 440MX/82443 datasheet and application programming guides, the GPIO pins are accessible through PCI config function 0, registers B0-B3, D4-DB, and E0-E3. this is from section 6-15 of
developer.intel.com/design/chipsets...ts/24529201.pdf

my question is, how do i access the PCI registers from userland C? i have seen some examples using inb/outb, but for the most part they are geared towards addressing the parallel port. i can look up the exact register values for the 440MX, that's not the problem -- the question is how does one implement userland-to-PCI-space read/write routines using the linux inb/outb primitives?

additionally, i understand some measures need to be taken to allow a userland application to write directly to PCI memory (ostensibly bypassing memory bounds checking). can anyone suggest some links which demonstrate how this is implemented as well?

any pointers appreciated.

thanks and regards,
jim

im not sure if there is a library out there that lets you do that, but u wouldn't be able to open /dev/kmem and write to the configuration space. that's controller dependent, and linux kernel has special kernel functions exported to let you do it in independent way, ie pci_read_config_byte() [/drivers/pci/pci.c]. what you could do is write a simple module that creates a device file and performs ioctls() that moves data to/from pci space for the process.
http://www.xml.com/ldd/chapter/book/ch15.html#t1