[SOLVED] create mask from core

b1bb2 · 03-20-2023, 03:47 AM

I use debian. New major version will be available soon.
I would like to start with: RISC-V IP processor soft core cpu or System-on-Chip (SoC);
and finish with: a mask set in the format of printable graphic files. Later this might be written in silicon.
I hope the output will fit on my system and can be croped and printed. I am not interested in field-programmable gate array (FPGA).

github.com search RISC-V gives 7,505 repository results. From there I downloaded some random cores:

Code:

mkdir -p /home/debian/Downloads/github.com/stnolting/neorv32
cd /home/debian/Downloads/github.com/stnolting/neorv32
git clone https://github.com/stnolting/neorv32.git

mkdir -p /home/debian/Downloads/github.com/YosysHQ/picorv32
cd /home/debian/Downloads/github.com/YosysHQ/picorv32
git clone https://github.com/YosysHQ/picorv32.git

mkdir -p /home/debian/Downloads/github.com/ultraembedded/riscv
cd /home/debian/Downloads/github.com/ultraembedded/riscv
git clone https://github.com/ultraembedded/riscv.git
cd

This looks allmost like what I want to do:

Code:

https://www.inseto.co.uk/wp-content/uploads/2019/08/ATP-Photo-Mask-Requirements.pdf
ATP-Photo-Mask-Requirements.pdf 
Photo Mask, Computer-Aided Design (CAD) and Data Conversion Requirements 
ATP can generate Photomasks from the following formats:
• AutoCAD .DWG or .DXF files
• Gerber photo plotter data
• GDSII files
• Dimensioned drawings
• Electromask data
• Rubylith artwork
• SolidWorks
ATP has a talented team of CAD professionals who will convert all of your formats.

These refrences have some good information:

Code:

semiengineering.com, universitywafer.com, inseto.co.uk, nanofab.ualberta.ca, htaphotomask.com, wikipedia.org/wiki/GDSII

Here are some statements I found from various sources:

Code:

A common size is 6- x 6-inch.
a single device may require between 5 to 40 (or more) individual photomasks, called a mask set.
A semiconductor photomask can cost anywhere from $250 to $100,000.
the CAD aspect of mask design.
A photomask is a tool used to transfer the patterned images of electronic devices and circuits to a silicon wafer.
GDSII stream format is a de facto standard, it is supported by nearly all EDA software.

I installed this meta package:
sudo apt install electronics-asic-dev
That did not seem to help, I do not know what to do with it. It did not install the following, I had to install manually:
sudo apt install klayout
That did not seem to help, I do not know what to do with it. What should I do now?

business_kid · 03-20-2023, 06:45 AM

It sounds like you're naive.

You're looking to build the input to a wafer fab project by the sound of it. You probably can already buy RiscV chips. You say 'core or SoC' like they're the same thing. The SoC has many cores, network, GPU, sound,USB, buses etc, usually in proprietrary IP cores that you buy and drop in. And then there's the firmware/microcode you haven't even thought about yet. You'd need a 6 or 7 figure sum behind you. You'd need to contract several guys working most of a year. Then you'd need to order an MOQ from a fab factory and have a fully designed pcb waiting for with all other parts waiting for it when it was delivered, etc. But by the sound of it, you want to get done on your debian box on a Saturday afternoon and be finished in time for tea.

Please confirm you're a serious capitalised business implementing a business proposition, or mark this solved. If you're having fun, enjoy the ride and put the horse before the cart - master VHDL first.

b1bb2 · 03-20-2023, 12:24 PM

Thank you for replying. Yes, on this topic I am naive.
I suppose one way to re-word my question is I am looking to build the input to a wafer fab project, but I would probably never use the input as such. For now I am trying to graduate from naive status. From what I understand so far, a mask can be created from a core. Yes?
I agree that I probably can already buy RiscV chips.
From my research it seems core may refer to CPU, SoC, or any other pre-built circuit. And a complex core can be made of more simple cores. Yes? Thank you for your explaination of this and now if this techinical definition is resolved I would like to move on. If I still have the wrong definition of soc then scratch that and just use CPU.
At this stage I am considering hardware only. Not software, firmware, microcode. I thought about those and decided I will consider them later. I want (and found) something that is already designed.
Yes, I agree that If I wanted to design and or fabricate then I'd need a 6 or 7 figure sum behind me. But now I just want to know how to get mask from design. My initial post has extra refrences and statements, it looks like they are confusing the issue. Sorry.
Yes, I want to get done on my debian box on a Saturday afternoon and be finished in time for tea. But I fear the computer processing time might take longer, and my system might not be sufficient. I will try because nothing ventured, nothing gained.
No, I am not a serious capitalised business implementing a business proposition.
If a mask can be created from (core or something downloaded from gethub) Please tell me how. Or if a mask can not be created please tell me why not. Then I will mark this solved.
Yes this is a fun project for me, I'm having fun, and enjoying the ride. I previously studied VHDL. That is a language that defines the core. If VHDL has a command to output mask, please tell me. If VHDL does not have this command, then I think it is off topic here. I do have some questions about it and may post them in another topic.

business_kid · 03-20-2023, 01:29 PM

I'm not up to date in this, but

Let's always specify any use of the word core to avoid confusion.
Your input to ASIC Design is a a VHDL Design possibly including many precompiled (VHDL) IP cores.
Usually it's many precompiled cores with VHDL as 'glue logic.'
As Wafer fab is also referred to as Lithography, that comes next. Super-complex lithography stage to decide where deposition takes place is. This akin to Silk Screen Printing, or PCB Manufacture.
Whereas both of the former are 2D processes, Wafer Fab is now a 3D process, as layer upon layer is built up vertically. Remember there is P doped deposition, N doped deposition, connection & insulation deposition.
The average Electronic engineer has no place in this process. This is an evolving speciality all of it's own. Input from an expert might result in a ≤1% yield of good wafers. Input from a anyone else results in a 0% yield.
Nearly all the processes are optimized to the Fab company's product line. Below about 7nm, every bit of shrinkage requires exhaustive testing of the basic transistor, of which there can be billions in a full-sized IC. There's also now the approach of parceling out the design into multiple smaller wafers to avoid undue thermal issues and crosstalk. But that process is not worry-free either.
For the wafer stage you approach some fab company, ask what they want from you; you give it to them; You pay the exorbitant tooling costs and probably cash up front for your order.
You will notice that hardly any company changes fab company or die size, but stay in bed with whichever company they got into bed with in the first place. All product testing is invalidated if they change fab size. A new chip may indeed go elsewhere.
You get back your chips whenever - 6 months + queue length at a guess.

My brother was CEO of a small Electronics outfit getting it's own LEDs made, and had a friend involved in Intel's Fab 14 factory. I think Fab 14 started life as 64nm fab but had huge seismic issues - in Ireland!!

b1bb2 · 03-20-2023, 04:02 PM

Thank you. That is all nice to know, but it does not answer my question. Or maybe it does and I am too naive to reconise that. I now ask my question another way. As I quoted in my initial post: ATP can generate Photomasks from the following formats. So it sounds like the fabrication plant needs to be given a CAD file. I download (something) from gethub. How to convert that (something) to CAD file?

To help clarify the word core, From each of the random cores I listed in my initial post, here is part of README.md. The first one is confusing so let us omit it. As these are random, you may find anything else to use as example.

Code:

github.com/stnolting/neorv32.git
The NEORV32 Processor is a **customizable microcontroller-like system on chip (SoC)** built around the NEORV32
[RISC-V](https://riscv.org/) CPU and written in **platform-independent VHDL**. The processor is intended as auxiliary
controller in larger SoC designs or as *ready-to-go* stand-alone custom microcontroller

Code:

github.com/YosysHQ/picorv32
Github: [http://github.com/ultraembedded/riscv](http://github.com/ultraembedded/riscv)
A 32-bit RISC-V core written in Verilog and an instruction set simulator supporting RV32IM.  
This core has been tested against a co-simulation model and exercised on FPGA.

Code:

github.com/ultraembedded/riscv
PicoRV32 is a CPU core that implements the [RISC-V RV32IMC Instruction Set]

business_kid · 03-21-2023, 08:36 AM

Quote:

Originally Posted by b1bb2

Thank you. That is all nice to know, but it does not answer my question. Or maybe it does and I am too naive to reconise that. I now ask my question another way. As I quoted in my initial post: ATP can generate Photomasks from the following formats. So it sounds like the fabrication plant needs to be given a CAD file. I download (something) from gethub. How to convert that (something) to CAD file?

First of all, my first contact with the fab plant would be before I finalised the design, as they might impose conditions on any input they process(e.g. JTAG).

As for your CAD file: The software involved is probably installation-specific for the various Fab lines around the world, and simply covers one machine. It's not in the Debian repo!

b1bb2 · 03-21-2023, 12:18 PM

Well, the designs from github.com are already finalised. I am not trying to make a design. And I am not trying to fabricate the design either.

Here is how I interpet what you said: Mask probably can not be made by a naive, using debian repo software, from designs downloaded from github.com. But a fabrication plant might be able to create mask, using installation-specific software.

And we now have an answer, which warrants this topic to be marked solved.

business_kid · 03-21-2023, 12:47 PM

I've outlined 100% of my knowledge on that subject. So I have nothing to add, anyhow.